Matthew Lu Liu

Hi! I'm Matthew, and I enjoy engineering and working with computers!

Project maintained by matthewliu2000 Hosted on GitHub Pages — Theme by mattgraham

Welcome to My Webpage

A little about me! I am from Fort Collins, Colorado, and I am a fourth year undergraduate studying Computer Engineering at Georgia Institute of Technology. Full time student looking for a summer internship in 2022, complete undergraduate studies in Spring 2023, and planning to pursue a graduate degree and seek future employment.

Georgia Tech

What to Find Here!

Objective Statement
Courses Completed by Spring 2022 (w/ descriptions)
Work Experience
Projects
Documents
Activities
My Hobbies and Interests
Contact and Support

ECE4122 UAV Drone Simulation
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Quick Bio

Fourth year Computer Engineer at Georgia Tech with industry experience in hardware engineering specializing in pre-silicon validation within a microcontroller of an SoC. Adaptable, resourceful, and adept at working in focused and collaborative environments, debugging problems during testing, and creating or finding solutions. Actively looking for hardware design engineering internships and co-ops Spring and Summer 2022.

My career goal is to immerse myself with state-of-the-art, comprehensive, interdisciplinary knowledge in computer engineering and computer science, and become well trained in integrating hardware and software, as well as application of engineering concepts and methods to computer systems engineering and design. I plan to pursue a graduate degree in ECE and/or seek a job in industry.

ECE Courses

Hardware and Software Programming: Instruction set architecture datapath and controller, memory (stack, heap, static), data abstractions (structs, arrays, linked lists, hash tables), File I/O, Embedded software, basic concurrency in multicore systems, assembly level programming, procedural abstraction (function calls, activation frames, etc.)

Advanced Programming Techniques: Distributed programming with MPI (Synchronous and Asychronous communications; Group Communication and Synchronization), Parallel programming with pthreads (Mutual Exclusion and Thread Synchronization), CUDA programming for high-speed parallel computations, Object-Oriented code templates (Typesafe callbacks with templates and Re-usable code with templates), Introduction to Data Mining using Map-Reduce (Google’s approach to managing large datasets), Event-based Programming (Typesafe event handlers), Introduction to graphics programming using OpenGL (2-D and 3-D coordinate transformations), Using web services (Introduction to SOAP and Performance considerations with web servcies), Using non-blocking system I/O (Asynchronous input-output programming and Handlng multiple sockes with select), TCP socket programming (server and client), Introduction to database programming using MYSQL (The MYSQL database access API and Security Issues with database programming).

Digital Design Laboratory: implement simple computer within a PLD, VHDL (design, implement, simulate circuits), design with graphical CAD tools, machine language and assembly language programs for simple computer, FPGAs, HDL based simulation and synthesis with FPGAs, oscilloscope, logic analyzer, timing simulation, state machine implementation, design verification with logic analyzer, combinational design using primitive gates, schematic capture, and VHDL

Circuit Analysis: Voltage, Current, Power, Energy, Kirchoff, linearity, superposition, Thevenin, Norton, Op Amps, first and second order circuits, RLC circuits, forcing functions, sinusoidal steady-state analysis, resonance, phasors, impedance, power analysis (instantaneous and average power, complex power, max power transfer)

Signal Processing: Phasors, sinusoids, harmonics, spectrogram analysis, Fourier series synthesis and analysis, aliasing, folding, continuous vs discrete time domains, convolution, filters (low, high, bandpass), DFT, Z-transform for FIR, MATLAB, Image enhancement, Time frequency analysis, sound and music synthesis, sample reconstruction

Math Foundations for Computer Engineering: discrete math, proofs, computational complexity, Fast Fourier transform, error detection and correction codes (parity coding), data abstractions, graph theory (trees, lists, Prim’s, Dykstra’s algorithms, etc.), regular expressions, state minimization, networks, algorithms (searching, sorting, closest path, recursion etc.)

Physical Foundations for Computer Engineering: Physical Implementation of a bit (barrier model), physics of CMOS based computation (semiconductor physics, MOSFET and device physics, switches as computing devices), physics of data communication via propagation through wire, alternative computing models (quantum computing)

Computer Architecture, Systems, Concurrency and Energy in Computation: instruction set architecture (mutli-cycle data path and control, controller implementation), CPU pipeline (hazards and solutions, branch prediction), Memory Systems (caches, main memory, virtual memory basics, OS level algorithms), Concurrency (threads, ILP, DLP, TLP), Energy and Power dissipation (microarchitecture-level, power virus, kernel benchmarks), I/O architecture and operating system support, CPU scheduling

Also Completed All Core Learning Courses (i.e. Physics, all Calculus courses, Discrete Math, Linear Algebra, English, etc.)

See embedded links for more details

Work Experience

Intel Corporation - RTL Validation Engineering Intern
Intel is a multi-national technology company focusing on semiconductors, computer hardware, autonomous vehicles, automation, AI. Amid some stiff competition, Intel still holds massive market shares in server and PC chip design and manufacturing. I primarily worked on server-chip design and validation.

Contributed to development of new BFM within pre-silicon validation environment for modeling power management firmware responses by improving code modularity and resuse and minimized reliance on firmware to validate RTL
For supported regression tests, the BFM reduces CPU model time by 27% and total cycles by 75%, enabling more efficient, more reliable, and timelier validation
Enabled validation tests for new generation of design
Provided validation collateral to identify RTL security bugs
Worked on identifying holes during code coverage analysis
Validation of a bridge between microcontrollers with multiple protocols layers and translations. Worked on new self-checking capabilities for old sequences, and scoreboard for data checks across serial wire.
Formal validation of a resource controller and python script automation of code development. Also worked on creating script to reformat monitor prints for easier debug.

intel

JDL International - IT & Marketing Intern
Waste water treatment company that develops and designs modular, on-site bioreactor technology to treat contaminated water. The company works with public and private organizations, like the UN, whom are concerned with environmental protection

Contributed in a variety of different IT, engineering, and marketing roles
Improved, fixed, and identified bugs on company website
Procured and conducted data analysis of water quality before and after FMBR treatment
Participated and observed an on-site installation of equipment
Attended trade shows, conferences, and onsite trainings on environmental protection

CIRA - NOAA Research Lab - Research Assistant and Climate Researcher
CIRA is a nexus for multi-disciplinary cooperation between atmospheric and NOAA research scientists

Gathered NOAA weather station data, parsed and analyzed the data (CSV files), with Fortran models, MATLAB, and GrADs (atmospheric science visual data analysis tool) and presented at Third Pole Environmental Conference
Worked with senior research scientist, Dr. Glen Liston to perform data analysis and modeling on regional conditional variations specifically within the Rocky Mountains, Alaska, and Greenland Ice sheets

Projects

Pipelined MIPS Processor in Verilog

Implemented pipelined MIPS processor that handles data, structural, and control hazards with load-to-use stall, data forwarding, and branch prediction with flushing
source code

Single-Cycle MIPS Processor in Verilog

Implemented a single-cycle MIPS processor instructions with fetch, decode, execute, memory, writeback stages for assembly instructions (slt, j, jal, lui, ori)
source code

GaTech Buzzy Bowl, 3D Drone Simulation with OpenGL and std::thread
SW Programmer, ECE4122

Programmed a drone show with UAVs that have physical dimensions of 1 kg and capable of generating 20N in any direction.
Multi-threaded each UAV so each UAV is controlled by a separate thread that updates kinematic information every 10msec
Flight path of each UAV follows kinematic rules F=ma, equations of motion for constant acceleration in each direction, and demonstrate elastic collisions between other UAVs
Each UAV must launch off ground after 5s, go towards point 0,0,50, and fly along surface of 10m radius virtual sphere for 60 seconds
source code and video demo and controls demo

CUDA and MPI programs to simulate 2D Steady State Heat Conduction in a Thin Plate using LaPlace’s Equation
SW Programmer, ECE4122

Two separate programs (one with CUDA and one with MPI) solves for NxN (up to 256x256) thin plate for I iterations (10,000+) with a border around the thin plate held at 100 deg C and one short segment held at 20 deg C using parallel programming and GPU to solve effectively with high efficiency for large quantities of iterative computations.
CUDA source code
MPI Source code

Buzzy’s Revenge Game w/ SFML API in C++
SW Programmer, ECE4122

Programmed an “angry-birds” type of game with features including opening screens, controls for changing initial velocity and launch angle, animated simple projectile motion path, rotation of “buzzy” based on direction of travel in air, point systems based on enemies hit, thread safe randomization of new level creation, moving targets, lives, scoring system and display, visual indicators for game state, etc.
source code and video demo and devmode demo

Cache Lab
SW Programmer, ECE3058

Determined hit rates, miss rates, and writeback traffic for various configruation of a 64 Kbyte unified set associative cache with LRU replacement policy, assuming a cold cache for each trace. C language used for virtual implementation
Compared this data on hit rates, miss rates, and traffic with a multi-0level (L1 and inclusive L2) cache with two direct mapped L1 caches for instruction and data, and a 56 Kbyte K-way set associative unified L2 cache with a line size of 64 bytes and write-back update policy
source code

TCP Sockets: Debugging Logging Server and Client
SW Programmer, ECE4122

Wrote console programs that takes as a single command line argument the port number on which the TCP Server will listen for multiple simultaneous connection/disconnection requests from clients.
source code

Modified Project Euler Problems
SW Programmer, ECE4122
Project Euler Link
Problems were modified to be more challenging or different from the existing problems online.
Problem #3: Prime Factors (source code and problem)
Problem #349: Langton’s Ant (source code and problem)
Problem #144: Investigating Reflections of a Laser Beam (source code and problem)
Problem #280: Ant’s and Seeds (source code and problem)

FPGA Controlled Autonomous “Wall Following Bot”
(see below for documentation)
HW and SW Programmer, ECE Department, ECE2031
Collective effort of four computer engineering and science majors

Developed an algorithm for wall following with a team of four computer engineering students by programming a DE2 board modified amigo bot (used Intel Quartus CAD tool for design)
Partially programmed the simple programmable computer (used by the amigobot) onto a FPGA with a processor, memory, and IO bus for interfacing with peripheral devices

github repo:

RPG Game made with MBED Hardware and Programmed in C
HW Design and Programmer, ECE Department, ECE2035

Independently developed a RPG, quest-based game using Mbed hardware.
Constructed a gaming circuit, coded in C, hash table data structure, OOP, interface between hardware and software
Video Recording of Game + Playthrough

github repo:

Minesweeper Computer Generated Solution
SW Programmer, ECE Department, ECE2035

Developed a computer-generated solution to the Minesweeper game using square inferencing techniques coded in both C and MIPS assembly language. Seeding the program generates different a random map for itself to solve.
Optimized memory, and reduced static and dynamic instructions

ePortfolio Project

This webpage was the end product created in ECE3005 Technical Communications class. link to start of webpage

Pacman Game with MBED Hardware and Programmed in C++
pacman
github repo:

Heap Data Structure developed w/ linked list implemented in C
github repo:

VPython Physics Simulations

Modeled electro-magnetic fields, charged objects (rods,disks,etc.), electrons, particle trajectories in gravitational field, 2D/3D motion, springs, etc.

particlebehavior
github repo:

Twitter API - Tweet Sentiment Analysis

Utilized programming skills in Python to conduct sentiment analysis on Tweets
Accessed real-time twitter messages using programs and made inferences from diction and semantics

Third Pole Environmental Conference Poster

Simple Computer (SCOMP) written in VHDL

Programmed a simple programmable computer onto an FPGA w/ a processor, memory, and IO bus for interfacing with peripheral devices.
SCOMP Code, Simulation, and Design
SCOMP Simulation Waveform and Schematics Oscilloscope Measurements

Train State Machine (VHDL)

Train Code, UML State Chart, and State Design

Internet Radio Broadcasting Station

Installed and manipulated Icecast, Iceweasel, and Ezstream into a BeagleBoard with UXTerm
Utilized IceCast to start a streaming service, capable of running and broadcasting our own music
Implemented programming skills in Java and Python during the project

Synchronous Clocked Finite State Machine(Physical Design)

Created using NI myDAQ instruments, breadboard, decoders, inverters, flipflops, etc.

“Flappy Bird” Game Design in Unity

Signal Processing in MATLAB

Plotting spectrograms, identifying folding, aliasing, filter design, interference removal, etc.

MATLAB Website Development Project
Access to WebPage here

Blackjack Simulation Game

Coded in MATLAB

Documents

DE2Bot Design Summary and Documentation:

DE2_Design_Summary.docx
Presentation:
DE2_Bot_Proposal.pptx

ECE3005 Technical Communications Website Design Presentation

ECE3005 Presentation.pptx

Third Pole Environmental Conference Poster

Short Technical Write-Ups

Hobbies and Interests!

Hobbies : piano, chess, basketball, classical films, TV, hiking, snowboarding, skiing, gaming, linux, vim editor
Interests : traveling, video editing, music production, food, science fiction, hardware development, validation, automation, machine learning, web design, consumer technologies

Glenwood Springs - August 2019
hiking

Steamboat Springs - December 2019
Snowboarding

Unix/Linux Distributions
unixdist

Pieces being worked on currently:

Glinka-Balakirev: The Lark
Rachminoff Prelude op23 no5

Organ Hall Recorded Performance 2013
International Keyboard Odyssiad Festival - Silver Medalist
Chopin - Fantaisie Impromptu
Debussy - Children’s Corner
Bach - French Suite no.6 in E major, Finalist Recital
Piano Performance

Activities

Phi Sigma Pi - National Honor Fraternity for Scholarship, Leadership, and Fellowship
Chess Club
Student Alumni Association
Concert Pianist - IKOF silver medalistcompetition information, Orchestra, PianoForte Org
phisigmapi
ikof

Contact and Support

Website Issues: 1matthewliu2000@gmail.com
Professional Contact: matthew.liu@gatech.edu

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